In "The Core(s) of What's Next", written in 2016 and published at the end of 2017 because the author somehow skipped it, I went into a lot of detail about the various chip architectures and what was coming up next.
Even though I did not publish it till recently, it was actually the post that stuck in my head the most on this topic and that I have been watching to see how things develop. Some interesting things.
When I wrote that post, SPARC was something I was seriously thinking about for a large UNIX deployment. My UNIX team loves the OS (Solaris), its solid as the day is long, and Oracle had put LOTS of microcode assists into SPARC in that made it very attractive for the project I had in mind
So now it appears for new projects we are left with AMD / Intel, IBM Power, and ARM. Sure, things on Solaris are supported out to the 2030's, so if you already have an investment there, its got a long life still.
We know IBM has announced it plans to take the current Power 8 architecture out to Power 9 and 10, and not only that, says they think they can get down to a 7 nanometer fab. In fact, I am starting to see that 7 nm number a fair bit now. That is, to me, the most interesting part of it because it ties into my whole thesis about Moore's Observation and where that is going.
Over in ARM-land we saw an interesting thing happen with the Snapdragon 835. That was the jump down to 10 nanometer on the fab. For green reasons, the most interesting part of that was the 40% lower power consumption. It also meant that the phone / mobile was pushing the envelope of size / power reductions. That makes sense, given the battery powered nature of that platform, but it has impact upstream when that same power / size reduction rolls onto servers. It was clearly not easy to get down to 10 nm. Cannonlake rolled out of 2017 into 2018.
In that second link is a quote from Intel's Senior Fellow, Mark Bohr, underlining the scaling down issue. It convinces me even further that the future of data center computing, and in fact, Green IT from the point of view of power consumption is going to be basically this: As chips can't scale down, there will be no choice but to scale out.
When we kicked off our "Go Big to Get Small" initiative, we removed over 1.1 megawatts from our data centers globally. That is a lot of power. But the company is not static. There are new products to support. We were bucking the power growth trend for a long time, but no more. Newer hardware is consuming twice as much power as older hardware. Admittedly it is doing 3 times as much computing too, but the bottom line for the DC is power growth.
I see the number (noted here) of 6% CAGR power increase fairly frequently, and I have zero reason to doubt it. The fab size went down a bit, but the cores and the RAM and all the rest continued going up.
For us its about supporting more customers and products. For the larger world its about IOT and apps and ever increasing numbers of mobile devices expecting the majority of their compute to be happening somewhere else. It may be your DC, it may be a cloud providers, or any mix of that, but the compute demand is there, driving DC growth and therefore more power usage.
At the end of Moore's Observation, there is still more computer demand to come. Much more.. We are just going to have to solve for that in ways others than getting smaller. I don't know if we stop at 7nm, or if we can get down to lower. It seems likely that whatever the absolute, physics required, bottom is, we are very near it.
Couldn't resist that last link. Sorry.